HiPC – High Performance Computing

Birds of a Feather Sessions

HiPC introduced this format in 2014 with the purpose of fostering greater participation by the academic and research community at HiPC, including both domestic and international representation. With a focus on emerging areas of interest, the goal is to stimulate new research ideas, address specific problems, and build a research community. The BoF content complements the main conference technical program and workshops that have peer-reviewed papers.

 The conference will host two such events this year.

 

BOF 1 : December 18, 11: 00 AM – 1:00 PM

Title of the event: gem5 Development using the POWER ISA v3.0 

Speakers: Basavaraj Talawar, Computer Science and Engineering, NITK, Surathkal. 
Sandipan Das and Gautham Shenoy, Linux Technology Center, IBM Systems Development Lab. 

 
Brief Description: The BoF will present the audience with a comprehensive introduction to computer architecture simulation. To improve simulator understanding, we will present the developer view of the state-of-the-art full system simulator, gem5. The participants will be shown how to add new, unimplemented instructions into the POWER processor modules in GEM5 directory structure. Armed with this knowledge, researchers can make modifications at the micro-architectural level in gem5’s processor modules. 

Schedule:

11:00 – 11:30 hrs : Introduction to Computer Architecture Simulation.

11:30 – 12:00 hrs : gem5 – architecture, modules, code tree.

12:00  – 13:00 hrs: POWER architecture modules code walk through, POWER modules implementation, addition of 2 instructions into the gem5 POWER tree, demo. 

 

BOF 2 : December 21, 10: 00 AM – 12:00 PM

Title of the event: Parallel Large Scale Graph Computation

Organizer: Dr. John Augustine IIT Madras & Dr. Kishore Kothapalli, IIIT Hyderabad

 

 

Please contact HiPC India Academia Liason for more details.

 

 

 

 

Scroll Up